AMD is making its biggest bet yet to compete with NVIDIA in AI infrastructure, committing $10 billion across Taiwan's semiconductor supply chain to manufacture and deploy its Helios rack-scale platform beginning in the second half of 2026. The investment spans packaging technology, substrate manufacturing, and system integration, signaling that AMD's AI hardware roadmap is no longer theoretical but backed by real production capacity.

What Is AMD Helios, and Why Does It Matter?

Helios is AMD's answer to NVIDIA's NVL rack systems, a fully integrated solution that bundles CPUs, GPUs, networking, and software into a single deployable unit designed for hyperscalers and enterprise data centers. The platform will be powered by AMD Instinct MI450X GPUs and 6th Generation EPYC "Venice" CPUs, both arriving in the second half of 2026. Unlike point products, Helios is a complete system architecture optimized for running large, complex AI workloads while managing power consumption and efficiency constraints.

The timing of AMD's announcement, made on May 21, 2026, came just one day after NVIDIA reported $81.6 billion in quarterly earnings. AMD's message to hyperscalers and governments evaluating AI infrastructure partners is direct: the supply chain is real, the products are on schedule, and the packaging technology is already qualified and ready for production.

How Does AMD's Packaging Innovation Enable Helios?

At the heart of Helios is a breakthrough in semiconductor packaging called EFB, or Elevated Fanout Bridge, a next-generation 2.5D interconnect technology that AMD is developing with Taiwan-based ASE and SPIL. EFB increases interconnect bandwidth and improves power efficiency, allowing Venice CPUs and MI450X GPUs to communicate faster while consuming less power. AMD has already achieved a major milestone by qualifying the industry's first 2.5D panel-based EFB interconnect, a critical step toward high-volume production.

Panel-based packaging represents a fundamental shift in how semiconductor dies are arranged on substrates. Instead of circular wafers, manufacturers use rectangular panels, the same transition that drove flat-panel display costs down dramatically in the 2000s. More dies per substrate means better manufacturing yield and lower cost per chip at high volume, giving AMD a long-term cost competitiveness advantage over competitors relying on traditional wafer-based approaches.

Which Companies Are Building Helios Systems?

AMD's $10 billion investment touches nearly every layer of the semiconductor supply chain. Leading original design manufacturers (ODMs) including Sanmina, Wiwynn, Wistron, and Inventec are building Helios-based systems at scale. These partners handle everything from rack-level design to high-volume manufacturing, ensuring that Helios can transition from prototype to production deployment across multiple gigawatts of data center capacity.

• ASE and SPIL: Developing and qualifying EFB wafer-based 2.5D packaging technology for Venice and MI450X interconnect
• Unimicron, Nan Ya PCB, and Kinsus: Providing advanced substrate solutions and high-performance substrates critical to system reliability
• Sanmina, Wiwynn, Wistron, and Inventec: Manufacturing Helios systems and handling rack-scale integration and high-volume production

What Does "Multi-Gigawatt Deployment" Actually Mean?

AMD's press release describes Helios as being on track for "multi-gigawatt deployments" beginning in the second half of 2026. This refers to the total power consumption of data centers being built around Helios-based infrastructure, a scale that puts AMD's ambitions directly in line with NVIDIA's "AI factory" buildout. For context, a single megawatt of data center capacity requires roughly 1,000 kilowatts of continuous power; multi-gigawatt deployments mean AMD expects Helios to power data centers consuming gigawatts of electricity simultaneously.

This scale matters because it demonstrates AMD is not announcing a niche product but a mainstream infrastructure platform expected to serve the same hyperscalers and cloud providers currently dependent on NVIDIA. The $10 billion investment is AMD pre-paying for production capacity it expects to fill as Helios deploys at this scale.

How Does AMD's Open Software Strategy Differentiate Helios?

Every Helios system ships with the AMD ROCm open software stack, an explicit alternative to NVIDIA's proprietary CUDA ecosystem. For enterprises and developers who have watched NVIDIA's CUDA create deep lock-in over decades, ROCm's open-source architecture offers a path to reduce vendor dependency. However, AMD's competitive advantage is not just the open license; it is backed by real hardware differentiation in chiplet architectures, high-bandwidth memory integration, 3D hybrid bonding, and rack-scale system design.

What About AMD's Inference Optimization Work?

Beyond Helios, AMD is also advancing the software layer for running large language models (LLMs) on its Instinct GPUs. In a technical article published on May 22, 2026, AMD detailed a methodology for optimizing LLM serving on MI300X GPUs using prefill-decode disaggregated serving, a technique that separates the input processing phase from the output generation phase to improve efficiency and responsiveness.

The key insight is that prefill and decode phases have fundamentally different performance characteristics. Prefill is compute-heavy and can fully utilize GPU compute with a single request, while decode is heavy on data movement and requires many concurrent requests to saturate compute. By disaggregating these phases, teams can optimize each independently, achieving better throughput per GPU while maintaining the responsiveness users expect from interactive AI systems.

AMD tested this methodology on a 72-GPU cluster running popular enterprise models including OpenAI's GPT-OSS-120B and Meta's Llama-3.3-70B-Instruct, demonstrating that the approach scales from single-stage benchmarking to realistic distributed deployment. This work is significant because it shows AMD is not just shipping hardware but providing the software optimization frameworks that help customers extract maximum efficiency from Instinct GPUs.

How to Optimize LLM Serving on AMD Instinct GPUs

For teams deploying large language models on AMD infrastructure, the company recommends a disciplined workflow for identifying the right configuration for a given model, workload, and service objective:

• Establish Baselines: Run aggregated configuration sweeps over different tensor parallel sizes and concurrency levels to understand how your model performs under various load conditions
• Evaluate Disaggregated Configurations: Independently benchmark prefill and decode phases to identify which prefill configurations can sustain your target decode throughput
• Perform a Pareto Sweep: Plot throughput per GPU against throughput per user to identify configurations that are optimal at different load levels and see where disaggregation benefits are most pronounced
• Validate at Scale: Test your selected configuration with a scale-out run on realistic distributed infrastructure before moving to production

"By combining AMD leadership in high-performance computing with the Taiwan ecosystem and our strategic global partners, we are enabling integrated, rack-scale AI infrastructure that helps customers accelerate deployment of next-generation AI systems," stated Lisa Su, Chair and CEO of AMD.

Lisa Su, Chair and CEO of AMD

Why Is This Announcement Significant for the AI Infrastructure Market?

AMD's $10 billion Taiwan commitment is the most concrete signal yet that Helios is not a roadmap slide or a future promise but a production program with qualified manufacturing partners and a defined deployment timeline. For hyperscalers frustrated by NVIDIA supply constraints and for data center operators building AI infrastructure, AMD's rack-scale alternative is arriving on schedule and at scale. The combination of EFB packaging innovation, panel-based substrate economics, qualified ODM partners, and optimized software frameworks suggests AMD is positioned to capture meaningful market share in the AI infrastructure buildout that will define the next decade of computing.