Huawei is pushing forward with its next-generation Ascend 960DT neural processing unit (NPU), targeting a Q1 2027 launch to challenge Nvidia's grip on enterprise AI infrastructure. The acceleration marks a significant shift in China's AI hardware strategy, revealing how geopolitical trade restrictions are forcing the country to develop independent alternatives to Western chip makers. The Ascend 960DT represents Huawei's most ambitious attempt yet to narrow the performance gap under severe technology export controls.

What Makes the Ascend 960DT Different From Current AI Chips?

The Ascend 960DT uses an advanced multi-chiplet module (MCM) architecture, a design strategy that allows Huawei to achieve competitive computing power without access to the most cutting-edge manufacturing processes. Instead of relying on a single large chip, the processor combines multiple smaller compute tiles alongside high-bandwidth memory stacks, similar to how TSMC packages advanced chips but adapted for Huawei's domestic foundry capabilities.

The chip's compute engine is built on an updated DaVinci 3.0 architecture with several key improvements designed to handle modern AI workloads. These enhancements include native acceleration for FP8 and INT4 data types, which are increasingly used in large language models to reduce memory requirements while maintaining accuracy. The processor also features dramatically enlarged on-chip cache, exceeding 256 megabytes per compute tile, to prevent memory bottlenecks during the token generation phase of inference.

Performance targets reveal Huawei's ambitions. The Ascend 960DT is designed to deliver over 1,100 teraflops of FP16 compute performance and over 2,400 teraflops of FP8 performance, compared to the current Ascend 910C's 320 and 640 teraflops respectively. While these numbers still trail Nvidia's Blackwell architecture in single-chip performance, Huawei's strategy focuses on cluster-level scaling, where thousands of NPUs work together through proprietary high-speed interconnects.

How Is Huawei Addressing the Software Challenge?

Raw computing power alone does not guarantee adoption. Nvidia's dominance rests largely on CUDA, a software platform that has become the industry standard for AI development over the past 15 years. Huawei's counter-strategy centers on CANN, the Compute Architecture for Neural Networks, which acts as a translation layer between high-level AI frameworks like PyTorch and the underlying hardware.

The company has made significant progress in building an ecosystem around CANN. External developers now outnumber internal developers working on CANN, and more than 40 models have been natively trained on Ascend hardware. Huawei also became the first official Chinese compute platform on PyTorch's website, a milestone that signals mainstream framework support.

However, developers still face real challenges when migrating AI workloads from Nvidia to Huawei hardware. Custom machine learning operators written in Nvidia's Triton or CUDA must be rewritten or automatically translated using CANN's operator builder API. Distributed training frameworks must adapt to Huawei's HCCS (Huawei Cache Coherent System) interconnect topology instead of Nvidia's NVLink ring structures. These technical hurdles mean enterprises cannot simply flip a switch to use Huawei chips; they must invest engineering effort to port and optimize their AI systems.

What Is Huawei's Broader Infrastructure Vision?

Beyond the Ascend 960DT chip itself, Huawei is building an entire ecosystem designed to make AI infrastructure more accessible and efficient. The company announced the Atlas 960E SuperPoD, a tightly coupled computing system where multiple NPUs share unified memory and function as a single logical computer. This approach reduces communication overhead that typically consumes over 40 percent of training time in traditional server architectures.

The Atlas 960E SuperPoD can house up to 4,096 NPUs and deliver 8 exaflops of computing power at FP8 precision. The system uses a new optical interconnect technology called Hi-ONE, which Huawei claims is the industry's first near-packaged optics (NPO) product ready for mass production. By replacing 48,000 traditional optical modules with 5,500 Hi-ONE units, Huawei cuts power consumption by over 550 kilowatts while improving system reliability and availability to 99.8 percent.

Multiple SuperPods can be connected into larger SuperClusters using Huawei's UnifiedBus technology, a high-speed interconnect that scales without limit. A two-tier, four-plane Clos architecture can interconnect up to 512,000 NPUs, rising to one million when combined with multi-rail topology. This modular approach allows enterprises to scale AI infrastructure incrementally rather than building massive monolithic systems.

How Are Enterprises Preparing for Hardware Diversity?

As hardware supply chains bifurcate into Western ecosystems (Nvidia, AMD) and Eastern ecosystems (Huawei, Moore Threads), enterprises face a critical decision: should they optimize for a single hardware platform or build software that can run on multiple architectures? The risk of being locked into a single supplier has prompted some companies to adopt abstraction layers that decouple software from specific hardware implementations.

Unified API gateway platforms can provide a middle ground, allowing developers to consume AI models through standardized endpoints while the underlying infrastructure routes workloads based on cost, latency, availability, and regional compliance requirements. This approach removes hardware-level dependencies from application code, enabling enterprises to shift between Nvidia, Huawei, and other platforms without rewriting their AI systems.

Steps to Navigate the Emerging Multi-Chip AI Landscape

• Evaluate Hardware Abstraction: Assess whether your AI workloads can be decoupled from specific hardware APIs using unified API layers or middleware platforms that support multiple chip architectures and vendors.
• Plan for Framework Compatibility: Ensure your development teams understand the differences between CUDA-based workflows and alternatives like CANN, and invest in training for engineers who may need to optimize code for non-Nvidia platforms.
• Monitor Ecosystem Maturity: Track the adoption of alternative hardware ecosystems by monitoring open-source project support, framework integrations, and the number of models natively trained on competing platforms before committing to large-scale deployments.
• Design for Portability: Build AI systems with modular architectures that isolate hardware-specific optimizations to discrete layers, making it easier to port workloads between different chip families as supply chains evolve.

What Does This Mean for the Global AI Hardware Market?

Huawei's acceleration of the Ascend 960DT roadmap signals that China is treating AI infrastructure as a strategic priority comparable to semiconductor manufacturing itself. The company is not simply copying Nvidia's approach; it is building alternative architectures, software stacks, and interconnect technologies designed specifically for the constraints and opportunities of domestic manufacturing.

David Wang, Deputy Chairman of the Board and Rotating Chairman at Huawei, emphasized the company's commitment to open ecosystems. He stated that Huawei is "committed to building powerful AI infrastructure and going open source and open system to build out computing ecosystems". This messaging suggests Huawei is positioning itself not as a replacement for Nvidia but as a viable alternative for enterprises seeking hardware diversity and reduced dependence on Western suppliers.

David Wang, Deputy Chairman of the Board and Rotating Chairman at Huawei

"SuperPoDs are designed to coordinate multiple NPUs through interconnect," said David Wang, Deputy Chairman of the Board and Rotating Chairman at Huawei.

David Wang, Deputy Chairman of the Board and Rotating Chairman at Huawei

The Kunpeng ecosystem, Huawei's broader platform for CPU and software development, has attracted over 4.16 million developers and more than 7,200 global ecosystem partners, with the community supporting over 560 open-source projects worldwide. This scale suggests that Huawei is building genuine developer momentum, not merely announcing products.

Looking ahead, Huawei plans to release the Ascend 970 and 980 chips in 2028 and 2029 respectively, with computing specifications expected to double each generation. The company is also investing heavily in memory architecture improvements, recognizing that modern AI workloads are increasingly memory-bound rather than compute-bound.

For enterprises, the emergence of credible alternatives to Nvidia creates both opportunity and complexity. The opportunity lies in competitive pricing, reduced supply chain risk, and the ability to negotiate better terms with multiple vendors. The complexity stems from the need to support multiple hardware platforms, manage different software stacks, and train teams on unfamiliar tools and architectures. The next two years will reveal whether Huawei's technical roadmap and ecosystem investments can translate into meaningful market share in enterprise AI infrastructure.