A new generation of ultra-low-power AI accelerators is making it possible to run sophisticated artificial intelligence directly on smartphones, smartwatches, and IoT devices without draining batteries or relying on cloud servers. Researchers and semiconductor companies are demonstrating that AI chips can deliver 3.1 times better performance while using 2.2 times less energy than conventional designs by combining FinFET transistor technology with near-threshold voltage (NTV) computing techniques.

What Technical Breakthroughs Enable Ultra-Low-Power AI?

The innovation centers on two complementary semiconductor techniques working together. FinFET transistor design reduces power leakage in chips by improving how transistors control electrical current, while near-threshold voltage operation cuts energy consumption by running processors at lower voltages than traditional designs. When combined, these techniques enable AI accelerators to achieve energy efficiencies of 40.6 TOPS/W (tera-operations per watt) at just 300 millivolts of supply voltage, according to research published in the International Journal of VLSI Design.

The practical benefit is significant: most AI today runs in distant data centers, requiring constant internet connectivity and draining device batteries. Ultra-low-power edge AI chips flip that model, allowing devices to perform complex neural network inference locally, keeping sensitive data on your device while preserving battery life.

How Are Companies Bringing These Chips to Market?

The transition from research to real products is accelerating rapidly. FotoNation, an Irish AI company, announced a strategic partnership with SEMIFIVE, a custom semiconductor design firm, to develop the TriSilica chip family, a line of ultra-low-power perceptual AI processors designed for edge applications. The collaboration leverages Samsung Foundry's advanced 8-nanometer Low Power Ultimate (8LPU) manufacturing process and represents SEMIFIVE's first major European project, signaling growing investment in edge AI infrastructure outside the United States.

"FotoNation is a pioneer in in-device computational imaging solutions, and its Vision AI technology is redefining what is possible at the edge. We are excited to help bring FotoNation's sophisticated TriSense IP Core solutions into high-performance silicon," said Brandon Cho, CEO and co-founder of SEMIFIVE.

Brandon Cho, CEO and co-founder of SEMIFIVE

The TriSilica platform is designed to handle multiple sensor inputs simultaneously, including audio, millimeter-wave radar, infrared, and standard RGB cameras. This multimodal sensor fusion capability means devices can understand their environment more completely while consuming minimal power, a critical advantage for wearables and autonomous systems that operate on battery power.

What Engineering Challenges Must Designers Overcome?

Building ultra-low-power AI chips requires solving several interconnected technical problems that emerge when pushing transistors to their limits:

• Process Variation Sensitivity: Manufacturing imperfections become more pronounced at smaller scales and lower voltages, requiring careful circuit design to ensure chips function reliably across production batches.
• Timing Closure at Ultra-Low Voltages: Electrical signals travel more slowly through circuits operating at reduced voltages, making it harder to meet performance deadlines without careful architectural optimization.
• Memory Access Bottlenecks: Moving data between processing units and memory consumes significant power, so engineers are integrating compute-in-memory (CIM) substrates that perform calculations directly where data is stored, eliminating wasteful data movement.

These innovations represent a fundamental shift in how semiconductor designers approach AI hardware. Rather than maximizing raw performance, the focus is on delivering sufficient intelligence within extreme energy constraints.

When Will These Chips Reach Consumer Devices?

The timeline is moving faster than many expected. FotoNation's initial product, the TS-210, is planned for a Multi-Project Wafer (MPW) shuttle scheduled for late 2026, which could accelerate the path to consumer products. Early applications will likely include advanced camera features in smartphones, health monitoring in wearables, and intelligent sensors in smart home devices.

"Our partnership with SEMIFIVE and its custom semiconductor capabilities will be a core driver for commercializing FotoNation's next-generation, ultra-high-performance, low-power sensor-fusion SoCs. We expect this collaboration to become a major turning point in advancing image processing and sensor-fusion technology to meet the demands of the rapidly growing edge AI market," stated Petronel Bigioi, CEO of FotoNation.

Petronel Bigioi, CEO of FotoNation

The convergence of advanced semiconductor techniques, specialized AI accelerator design, and strategic partnerships between companies is creating a new category of intelligent devices that don't require constant cloud connectivity. As these chips move from research papers into production silicon, they could reshape how billions of people interact with AI on their personal devices, shifting the balance of power away from centralized data centers and toward distributed, privacy-preserving intelligence at the edge.