MIPS has rejected the idea that a single neural processing unit (NPU) can handle all edge AI workloads, instead launching three specialized developer platforms designed for fundamentally different computing demands. The move reflects a growing recognition in the chip industry that physical AI, which powers robots, autonomous vehicles, and industrial machinery, requires more than just raw inference speed. It needs platforms tailored to inference tasks, real-time event processing, and safety-critical systems where reliability matters as much as performance.

Why Are Three Separate Platforms Better Than One?

The three platforms, called Acies, Actus, and Aegis, each target a distinct phase of how machines interact with the physical world. A robot or industrial control system does far more than run a neural network. Sensors generate data continuously, processing identifies what is happening, real-time software must respond within defined time windows, actuators must be controlled safely, and communications link the machine to neighboring controllers or higher-level systems. The fastest compute engine is only one element in that closed loop.

MIPS has increasingly organized its portfolio around this distinction through its broader Atlas work, describing physical AI as a cycle of sensing, thinking, acting, and communicating. That framing gives the three new platforms a clearer purpose and reflects the actual engineering requirements of machines operating in the real world.

What Does Each Platform Do?

• Acies (Inference-Focused): Combines an open, standards-based neural processing unit with an open software stack and developer-oriented hardware for modern edge workloads. It concentrates on interpreting information from sensors and making predictions based on trained AI models.
• Actus (Event-Driven): Targets real-time event processing for applications including motion control, sensor fusion, and predictive maintenance. These systems may use AI algorithms, but their engineering requirements differ substantially from pure inference accelerators because latency and deterministic response can matter more than maximum aggregate operations per second.
• Aegis (Safety-Critical): Aimed at mission-critical physical AI systems requiring low-latency and agentic processing with a safety-oriented architecture. It addresses systems where the response must satisfy demanding reliability and safety requirements, such as autonomous vehicles or industrial robots in hazardous environments.

The three-way division reflects a fundamental insight: the fastest compute engine is only one element in a closed loop. A robot or industrial control system must sense its environment, think about what to do, act on that decision, and communicate with other systems, all within strict time and safety constraints.

How to Evaluate These New Edge AI Platforms

• Check Processor Specifications: Look for detailed processor configurations, memory hierarchies, accelerator throughput, and interfaces. MIPS has not yet published these details for any of the three platforms, which limits meaningful performance comparisons with established embedded AI development systems.
• Assess Software and Toolchain Support: Evaluate the open software stack, development tools, operating systems, middleware, and accelerator support. A commercially useful embedded platform depends on more than just hardware; it requires a complete ecosystem for developers to build and deploy applications.
• Verify Safety Certification Pathways: For Aegis especially, confirm whether the platform has defined safety architecture and a credible route to production certification. The launch does not state a particular ASIL (Automotive Safety Integrity Level) or SIL (Safety Integrity Level) certification for Aegis itself.
• Review Production Schedules and Pricing: Determine when hardware will be available, what it will cost, and how it integrates with existing design flows. MIPS has not published board specifications, pricing, or production schedules for any of the three platforms.

The lack of detailed platform specifications represents the most important limitation of the current launch. MIPS has not published processor configurations, memory hierarchies, accelerator throughput, interfaces, board specifications, pricing, or production schedules for Acies, Actus, and Aegis. Those omissions prevent a meaningful performance comparison with established embedded AI development systems and create a straightforward set of next milestones.

What Does This Mean for the Broader Chip Industry?

MIPS's move comes as the company has undergone significant structural changes. GlobalFoundries completed its acquisition of MIPS in August 2025 and added Synopsys' ARC Processor IP Solutions business in June 2026. The combined MIPS and ARC operation now spans RISC-V processor IP, software tools, application-specific processor technology, custom design, and access to GlobalFoundries manufacturing. GlobalFoundries says the combined portfolio is backed by more than 150 patents and serves more than 300 processor IP customers.

MIPS has also reinforced its position inside the RISC-V ecosystem as part of the same strategy. In August, it became a Premier Member of RISC-V International, with chief technology officer Yankin Tanurhan appointed vice-chairman of the organization's board. Open instruction-set standards can make processor customization and software portability easier, but a commercially useful embedded platform still depends on toolchains, operating systems, middleware, accelerators, interfaces, safety evidence, and production silicon.

Dividing physical AI according to workload is technically more useful than placing every edge processor under the same AI label. However, development platforms earn their place on an engineer's bench through interfaces, documentation, benchmarks, and a credible route into production hardware. Acies will need measured inference efficiency and supported models, Actus will need credible deterministic timing and control-loop data, and Aegis will need a defined safety architecture and certification pathway.

The broader chip industry is increasingly recognizing that edge AI is not a monolithic problem. Different applications, from inference-heavy computer vision to real-time motor control to safety-critical autonomous systems, have fundamentally different requirements. MIPS's three-platform approach signals that the future of edge AI may be less about finding the fastest single processor and more about matching the right specialized hardware to the right workload.