Nvidia's grip on artificial intelligence infrastructure is evolving in a way that could prove even more durable than its current dominance in graphics processing units (GPUs). Rather than relying solely on manufacturing the fastest chips, the company is positioning itself as the architect of the entire "AI factory",the interconnected system of processors, networking, cooling, and software that powers modern AI workloads. A partnership announced on September 10, 2026, between Nvidia and d-Matrix, an inference-chip startup, offers a revealing glimpse into this strategic shift.

Why Is Nvidia Partnering With a Competitor?

At first glance, the announcement seemed routine. d-Matrix, which has spent years developing alternatives to conventional GPUs, agreed to integrate its next-generation Raptor XPU (a specialized processor for running trained AI models) directly into Nvidia's infrastructure through a technology called NVLink Fusion. The first Raptor-equipped racks are expected to reach customers in the fourth quarter of 2027, with the Raptor chip itself completing its final design stage before the end of 2026.

But the strategic significance runs much deeper. d-Matrix exists because its founders believe that inference,the continuous, high-volume work of running trained AI models for billions of users,can be performed more efficiently on specialized architectures than on general-purpose GPUs. The company's Raptor accelerator uses a 3D in-memory compute architecture that stacks computation and memory closely together to reduce the latency and energy cost of moving data, which d-Matrix identifies as the true bottleneck in large-scale AI inference.

In other words, d-Matrix is not trying to clone Nvidia. It is an "architectural dissident," a company whose entire reason for existing is the conviction that Nvidia's dominant accelerator paradigm is not optimal for the workload that will define the next decade of computing. Yet instead of forcing customers to choose between a d-Matrix system and an Nvidia system, Raptor is being designed to enter the Nvidia rack itself.

How Does Nvidia Control the Ecosystem Without Making Every Chip?

The Raptor XPU will be integrated into Nvidia's latest rack reference architecture, an environment populated by Nvidia Vera CPUs, NVLink switches, BlueField-4 data processing units (DPUs), ConnectX-9 SuperNICs (specialized networking processors), and Spectrum-X Ethernet networking. Connectivity specialist Astera Labs supplies custom high-speed data-flow solutions, and the entire rack is built from modular, cable-free trays drawn from Nvidia's mature MGX ecosystem and global supply chain.

This arrangement reveals a crucial insight: the XPU may belong to d-Matrix, but the rack still speaks Nvidia. The processor may be specialized, yet the scale-up fabric, the scale-out network, the data-processing infrastructure, the reference architecture, the deployment supply chain, and the management software can all remain organized around Nvidia technology. Nvidia does not need to manufacture the inference accelerator at the center of every workload in order to remain deeply, perhaps decisively, embedded in the system surrounding it.

"Demand for inference is soaring, but capital, time and energy remain finite," said Sid Sheth, cofounder and CEO of d-Matrix.

Sid Sheth, Cofounder and CEO, d-Matrix

This distinction matters because the AI industry is entering a period in which the accelerator itself is becoming structurally more heterogeneous. Training, post-training, reinforcement learning, long-context reasoning, retrieval, video generation, robotics, and high-volume inference do not necessarily favor an identical processor architecture. The largest buyers of compute have concluded that they cannot afford to pretend otherwise.

What Are the Major Players Building Custom AI Chips?

• Amazon: Continues to advance Trainium, whose third generation is delivering up to 40 percent better price-performance than its predecessor, with future revenue commitments from customers reported at more than $225 billion.
• Google: Continues to iterate its TPU (Tensor Processing Unit) line for specialized AI workloads within its own infrastructure.
• Meta: Plans to begin manufacturing Iris, the newest chip in its MTIA (Meta Training and Inference Accelerator) program, in September 2026, as part of an infrastructure plan that contemplates as much as $145 billion of AI spending this year and a doubling of computing capacity from seven gigawatts to fourteen gigawatts by 2027.
• OpenAI: Has committed, with Broadcom, to deploying ten gigawatts of its own custom-designed accelerators between late 2026 and 2029.
• Other competitors: Qualcomm is moving into datacenter AI silicon; Broadcom and Marvell are building custom-chip franchises measured in the tens of billions of dollars; and startups such as d-Matrix and Groq have designed processors around inference rather than general-purpose GPU computation.

The semiconductor market could therefore become considerably more fragmented at the level of the processor even while the infrastructure surrounding those processors becomes more standardized. It is precisely in that gap, between fragmenting silicon and consolidating architecture, that the next great contest of the AI economy may be located.

How Is Nvidia's Financial Position Supporting This Strategy?

Nvidia's financial results underscore the company's ability to invest in this broader infrastructure play. In its fiscal second quarter of 2027, ended July 26, 2026, Nvidia reported revenue of $96.2 billion, up 106 percent from a year earlier. Of that total, $89.0 billion came from the data center segment alone, with gross margins of 75 percent and guidance pointing toward $108 billion in the following quarter, while assuming zero data-center compute revenue from China.

"AI has reached its inflection point. It's doing useful work," said Jensen Huang, founder and CEO of Nvidia.

Jensen Huang, Founder and CEO, Nvidia

These numbers reflect the company's dominance in the first phase of generative AI, when the central question was straightforward: who owns the best accelerator? Nvidia's answer was overwhelmingly persuasive. But the next stage of the industry may revolve around a different question entirely: who defines how hundreds or thousands of heterogeneous accelerators communicate, share memory, move data, connect to networks, fit into racks, obtain software support, and operate together as one AI factory ?

What Is Nvidia's Vision for the Entire Datacenter as One Computer?

Nvidia's Vera Rubin architecture, unveiled in detail at CES 2026 and entering production shipments in the fall of 2026, illustrates how far the unit of competition has moved beyond a discrete GPU. Vera Rubin NVL72 combines 72 Rubin GPUs, 36 Vera CPUs, NVLink 6 switching, ConnectX-9 SuperNICs, and BlueField-4 DPUs into a single liquid-cooled rack that Nvidia explicitly describes as one AI supercomputer. Spectrum-X Ethernet and Quantum-X800 InfiniBand extend the system outward across pods and campuses.

Nvidia increasingly describes the entire datacenter as the computing unit rather than the individual processor. This shift in perspective is strategic. Even as competitors develop specialized chips optimized for specific AI workloads, Nvidia's control over the fabric that connects these chips, the software that orchestrates them, and the reference architectures that customers deploy gives the company a form of power that transcends any single semiconductor product.

How to Understand Nvidia's Evolving Competitive Moat

• Accelerator dominance: Nvidia's GPUs remain the fastest and most widely deployed AI processors, but this advantage is increasingly challenged by custom chips from major cloud providers and startups.
• Fabric control: Nvidia's NVLink technology, networking processors, and reference architectures create a standardized environment in which competing accelerators can operate, giving Nvidia a form of control that persists even if competitors win individual chip competitions.
• Software and ecosystem: Nvidia's CUDA programming framework, management tools, and partnerships with companies like Astera Labs create switching costs that make it difficult for customers to abandon the Nvidia ecosystem entirely, even if they adopt alternative accelerators for specific workloads.
• Supply chain integration: Nvidia's mature MGX ecosystem and global supply chain allow the company to offer customers a complete, integrated solution rather than a collection of point products, reducing friction in deployment and scaling.

The d-Matrix partnership is therefore not a sign of Nvidia's weakness but rather a preview of how the company intends to maintain its dominance as the AI infrastructure market matures. By welcoming architectural dissidents into its ecosystem, Nvidia transforms potential competitors into partners whose success depends on Nvidia's infrastructure. The company does not need to win every chip competition if it can define the rules of the game itself.